1. Technical Field
The present invention relates generally to an improved data processing system, and in particular to a method and apparatus for receiving data packets. Still more particularly, the present invention provides a method and apparatus for parsing data packets.
2. Description of the Related Art
Transmission of packets between data processing systems involves a number of steps. Data within a data processing system is collected through a feature, such as direct memory access (DMA). The data is assembled into a single packet and sent across a communications link to a target data processing system. The packet includes a header and a payload. The header includes information identifying the target, payload type, source, and various control data as specified by the protocol while the payload holds the data that is transmitted. When a packet is received at a data processing system, the packet is parsed to see if the packet is intended for the data processing system.
IEEE 1394 is an international serial bus standard. This standard provides a low cost digital interface that can be used for multimedia applications. Data may be transported at 100, 200 or 400 megabits per second as per the IEEE 1394-1995 Annex J Phys-Link Interface Specification. A 1394 serial bus supports two types of data transfer: asynchronous and isochronous. Asynchronous data transfer emphasizes delivery of data at the expense of no guaranteed bandwidth to deliver the data. Data packets are sent and an acknowledgment is returned. If a data defect is present, the packet can be resent. In contrast, isochronous data transfer guarantees the data transmission bandwidth through channel allocation, but cannot resend defective data packets. This type of transfer is especially useful with multimedia data.
Currently, on a data processing system using the 1394 standard, a link, providing the interface to the 1394 serial bus, must parse a received packet to determine whether to accept the packet and whether to acknowledge acceptance of a packet. If the packet is accepted, the link places the packet into a buffer configured as a first-in-first-out (FIFO) buffer. On the other side of the FIFO buffer in the data processing system is a DMA engine that removes the packet and parses the packet in a manner similar to the link.
This mechanism results in redundant functions and circuitry. Therefore, it would be advantageous to have an improved method and apparatus for receiving packets on a data processing system.